发明名称 Semiconductor device manufacturing method capable of reliable inspection for hole opening and semiconductor devices manufactured by method
摘要 A substrate defining an insulating surface layer portion and formed with a wiring groove filled with a wiring line the wiring line is electrically connected to a conductive member. The conductive member occupies an area larger than an area of the wiring line as viewed along a line parallel to a normal to the first surface. An insulating first film is formed on the first surface. A via hole is formed through the first film. The via hole is formed so that a boundary between the wiring line and the insulating surface layer portion passes through the inside of the via hole. The bottom of the via hole is observed with an apparatus for obtaining image information by utilizing secondary electrons and reflection electrons, to judge whether a state of the bottom of the via hole is accepted or rejected.
申请公布号 US2003186472(A1) 申请公布日期 2003.10.02
申请号 US20030428937 申请日期 2003.05.05
申请人 FUJITSU LIMITED. 发明人 WATANABE KENICHI
分类号 H01L21/66;H01L21/3205;H01L21/768;H01L23/52;H01L23/522;(IPC1-7):H01L21/66;H01L21/476 主分类号 H01L21/66
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