发明名称 |
Single poly embedded eprom |
摘要 |
The present invention proposes a novel structure of nonvolatile memory. The aspect of the present invention includes two serially connected PMOS transistor. The characteristic of the devices is that bias is not necessary to apply to the floating gate during the programming mode. Thus, the control gate is omitted for the structure or layout, thereby saving the space for making the control gate. The present invention may "automatically inject" carrier into floating gate for programming the status of the device.
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申请公布号 |
US2003142542(A1) |
申请公布日期 |
2003.07.31 |
申请号 |
US20020055047 |
申请日期 |
2002.01.25 |
申请人 |
YANG CHING-SUNG;SHEN SHIH-JYE;HSU CHING-HSIANG |
发明人 |
YANG CHING-SUNG;SHEN SHIH-JYE;HSU CHING-HSIANG |
分类号 |
G11C16/04;(IPC1-7):G11C5/06;G11C11/34 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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