发明名称 SIMULTANEOUS FORMATION OF CHARGE STORAGE AND BITLINE TO WORLDLINE ISOLATION
摘要 One aspect of the present invention relates to a method of forming a non-volatile semiconductor memory device, involving the sequential or non-sequential steps of forming a charge trapping dielectric over a substrate, the substrate having a core region and a periphery region; removing at least a portion of the charge trapping dielectric in the periphery region; forming a gate dielectric in the periphery region; forming buried bitlines in the core region; and forming gates in the core region and the periphery region.
申请公布号 KR20030060958(A) 申请公布日期 2003.07.16
申请号 KR20037007118 申请日期 2003.05.27
申请人 发明人
分类号 H01L21/8247;H01L21/8246;H01L27/105;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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