SYSTEMS WITH SKEW CONTROL BETWEEN CLOCK AND DATA SIGNALS

摘要

In some embodiments, the invention includes a controller that has clock signal transmitters to transmit Clk signals and data signal transmitters to transmit Data signals. Multi-phase producing circuitry includes multiple taps to receive a clock signal and in response thereto to produce phases on the taps. Delay determining circuitry determines relative delays to be provided between the Clk signals and Data signals and to provide signals regarding the relative delays, and delay adjustment circuitry receives the signals regarding relative delays and select amongst the taps to achieve the relative delays between the Clk and Data signals. Other embodiments are described and claimed.