发明名称 Simulation-test procedure for an integrated circuit
摘要 Test method makes use of a test vector comprising serial input values (SHIFTIN) and output values. Method has the following steps: placing of a circuit in serial mode at the start of clock cycle (CLK); positioning in parallel of serialized input values of the test vector at the selectors (S); parallel changing of the input values in the flip flops associated with the selectors; placing the circuit in normal mode; capture of the resulting values (SHIFTRES) from the flip flops; parallel collection of the result values and comparison with the serialized values from the output test vector.
申请公布号 EP1324061(A2) 申请公布日期 2003.07.02
申请号 EP20020080373 申请日期 2002.12.19
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 SOUEF, LAURENT;SOLARI, EMMANUEL;ROGGE, SOENKE;KYTZIA, RAINER;WITTKE, MICHAEL
分类号 G01R31/28;G01R31/3185;G06F17/50;(IPC1-7):G01R31/318 主分类号 G01R31/28
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