发明名称 FIXED-WIDTH MULTIPLIER APPLYING MODIFIED BOOTH DECODER AND MULTIPLING METHOD THEREOF
摘要 PURPOSE: A fixed-width multiplier applying a modified booth decoder and a multipling method thereof are provided to definitely compensate for errors of lower bits by applying a modified booth decoder to a multiplication operator. CONSTITUTION: A multiplication operator receives a booth code modified corresponding to a bit sequence of an N bit multiplier, and a bit sequence of an N bit multiplicand, and outputs each partial multiplication result. The multiplication operator calculates an error compensation bias corresponding to the lower N-1 bit multiplication result by using all the partial multiplication results used in calculating the lower N-1 bit multiplication result. The operator calculates an upper N bit multiplication result by using the partial multiplication results and the error compensation bias.
申请公布号 KR20030049180(A) 申请公布日期 2003.06.25
申请号 KR20010079320 申请日期 2001.12.14
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 CHOI, JEONG PIL;JUNG, JIN GYUN;LEE, GWANG CHEOL;PARK, YUN OK
分类号 G06F7/44;(IPC1-7):G06F7/44 主分类号 G06F7/44
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