发明名称 APPARATUS FOR GENERATING CLOCK OF SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY DEVICE FOR POWER REDUCTION
摘要 PURPOSE: An apparatus for generating a clock of synchronous dynamic random access memory(SDRAM) device for the power reduction is provided to reduce the power consumption of a portable device by supplying a clock to SDRAM according to SDRAM requesting clock. CONSTITUTION: An apparatus for generating a clock of synchronous dynamic random access memory(SDRAM) device for the power reduction includes a clock generator(10) for generating a clock having a predetermined period, a memory controller(18) for setting the operation mode of the SDRAM(14) in response to the order from outside and for selectively activating the clock enable signal(SCLK EN) corresponding to this and a gate(12) for transmitting the signals outputted from the clock generator(10) to the SDRAM(14) in response to the activation of the clock enable signal(SCLK EN).
申请公布号 KR20030044385(A) 申请公布日期 2003.06.09
申请号 KR20010075109 申请日期 2001.11.29
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JUNG, HYEON SEUNG
分类号 G11C11/407;(IPC1-7):G11C11/407 主分类号 G11C11/407
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