发明名称 Multi-layer wiring structure of integrated circuit and manufacture of multi-layer wiring
摘要 A first wiring layer is formed on an insulating film. The first wiring layer is formed by sequentially laminating a barrier layer, an Al alloy layer, and an antireflection layer. The antireflection layer is formed by sequentially laminating a Ti layer, a TiN layer, and a TiON layer. After an interlayer insulating film is formed on the first wiring layer, a contact hole is formed through the interlayer insulating film and a tight adhesion layer is formed on an inner surface of the contact hole. The tight adhesion layer is formed by sequentially laminating a Ti layer, a TiN layer, a TiON layer, and a TiN layer. A W plug is embedded in the contact hole through CVD using WF6. Thereafter, an Al alloy layer and an antireflection layer are sequentially deposited and patterned to form a second wiring layer. Pin holes are not formed in the uppermost TiON layer of the first wiring layer while the contact hole is formed through etching, and diffusion of WF6 is intercepted by the TiON layer of the tight adhesion layer while W is deposited so that a high resistance AlFx layer is not formed in the second wiring layer. Resistance of an interlayer contact area of a multi-layer wiring structure can be prevented from being increased.
申请公布号 US6555465(B2) 申请公布日期 2003.04.29
申请号 US20020175994 申请日期 2002.06.19
申请人 YAMAHA CORP. 发明人 YAMAHA TAKAHISA
分类号 H01L21/285;H01L21/768;(IPC1-7):H01L21/28 主分类号 H01L21/285
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