发明名称 METHOD AND SYSTEM FOR DETECTING FALSE PACKETS IN WIRELESS COMMUNICATIONS SYSTEMS
摘要 Specific bits and bit fields of incoming packets are compared against a predetermined bit pattern(s). If the bits and/or bit fields do match corresponding parts of the predetermined bit pattern(s), the incoming packet is ejected as a false packet. A register stores the predetermined bit pattern. The predetermined bit pattern contains specific values for particular bit locations, specific values for fields within a packet, a table of valid values, and/or a range of valid values for anyone or more bits and/or bit fields of a packet. Parity " checks may be performed in addition to checking for the predetermined bit I fields. The specific bits and bit fields are restricted according to packet protocol standards, device standards, and/or implementation standards to the predetermined bit pattern(s). A user interface is utilized to collect the predetermined bit patterns and/or initiate or modify validity checks on specifiq: fields of the packets.
申请公布号 WO03028272(A2) 申请公布日期 2003.04.03
申请号 WO2002US30449 申请日期 2002.09.24
申请人 ATHEROS COMMUNICATIONS INC. 发明人 MCFARLAND, WILLIAM, J.;THOMSON, JOHN, S.
分类号 H04L1/00;H04L1/24 主分类号 H04L1/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利