发明名称 Semiconductor device of multi-wiring structure and method of manufacturing the same
摘要 A plurality of wiring layers (11, 12, 13) are laminated on an LSI chip. Each wiring layer includes an electrode (17) to which is applied a mechanical pressure, a first insulating film (16) formed in a region where it is necessary to have a high mechanical strength and having the electrode (17) formed therein, a second insulating film (14) formed in the same layer as the layer of the first insulating film (16) and formed in a region where a mechanical strength higher than that of the first insulating layer (16) is not required, and a wiring layer (15) formed on the surface of the second insulating film (14). <IMAGE>
申请公布号 EP1298725(A2) 申请公布日期 2003.04.02
申请号 EP20010128356 申请日期 2001.11.30
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MATSUNAGA, NORIAKI;SHIMOOKA, YOSHIAKI;HIGASHI, KAZUYUKI;SHIBATA, HIDEKI
分类号 H01L23/52;H01L21/31;H01L21/3205;H01L21/822;H01L23/485;H01L23/522;H01L23/532;H01L27/04 主分类号 H01L23/52
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