发明名称 |
Test outputs using an idle bus |
摘要 |
A test circuit receives a plurality of internal test signals and delivers a group of the plurality of internal test signals onto a bus during an idle state of the bus. The bus is coupled to output pins so that the group of internal test signals can be used in debugging operations. The test circuit may include a multiplexing circuit that receives the plurality of internal test signals as inputs and that delivers a selected group of the internal test signals as outputs. The test circuit may also include a switch that couples the selected group of the internal test signals onto the bus during an idle state.
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申请公布号 |
US2003060995(A1) |
申请公布日期 |
2003.03.27 |
申请号 |
US20010953836 |
申请日期 |
2001.09.17 |
申请人 |
SHAH PARAS A. |
发明人 |
SHAH PARAS A. |
分类号 |
G01R31/317;G01R31/319;(IPC1-7):G06F19/00;G01R27/28;G01R31/00;G01R31/14 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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