Raster distortion correction arrangement

摘要

Synchronization of a horizontal deflection circuit with horizontal synchronizing signal pulses (SH) is obtained by the use of a voltage controlled oscillator (VCO) (31) that is included in a phase-lock loop circuit (PLL) (LO). A phase-control loop circuit (PCL) (301) includes a phase detector (201) having a first input terminal that is responsive to an output signal of the VCO (OH2) and a second input terminal that is responsive to retrace pulses (HFB) of a horizontal deflection circuit output stage (99). A sum signal (V103) of the phase detector output signal (VPH) of the PLL (20) and a vertical rate parabola signal (IPAR) is formed upstream of the loop filter (110) of the PLL. Correction of a differential pin distortion is accomplished by dynamically phase shifting the phase of an output signal of the VCO (0432H) in a vertical rate parabola manner. <IMAGE>