发明名称 SYNCHRONIZATION TRACKING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a synchronization tracking circuit capable of reducing a circuit scale and power consumption by tracking synchronization by a reduced measuring time and a small phase. SOLUTION: When a synchronization tracking point in an (N-2) slot section is±0 chip period among phases obtained by over-sampling a received signal and dividing it to five different -(1/2), -(1/4),±0, +(1/4) and +(1/2) chip periods; a control circuit continues synchronization tracking processing by operating a corresponding complex multiplier, a correlating device, a register for correlation value of each phase, a power arithmetic units, and a register for a power value of each phase so that the correlation value and power value in an (N-1) slot section are measured only in a±chip period of the phase of a synchronization tracking point and a +(1/4) chip period before/after it.</p>
申请公布号 JP2003060529(A) 申请公布日期 2003.02.28
申请号 JP20010250955 申请日期 2001.08.22
申请人 NEC CORP 发明人 YAMADA JUNYA
分类号 H04B1/707;H04B1/7085;H04L7/00 主分类号 H04B1/707
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