发明名称 |
Inputs and outputs for embedded field programmable gate array cores in application specific integrated circuits |
摘要 |
An architecture to efficiently handle primary input and output signals for an embedded FPGA core in an ASIC is disclosed. Only the FPGA core is used without wire-bonding pads and pad ring found in conventional embedded FPGAs. The input and outputs of the embedded FPGA core can be made peripherally or at selected locations throughout the core to obtain high I/O-to-logic ratios and flexibility in I/O placement with high routability.
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申请公布号 |
US2003025132(A1) |
申请公布日期 |
2003.02.06 |
申请号 |
US20020202443 |
申请日期 |
2002.07.24 |
申请人 |
TOBEY JOHN D. |
发明人 |
TOBEY JOHN D. |
分类号 |
H01L27/118;H03K19/173;H03K19/177;(IPC1-7):H01L21/82;H01L27/10 |
主分类号 |
H01L27/118 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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