发明名称 Switched-capacitor circuits and methods with improved settling time and systems using the same
摘要 A switched capacitor circuit (300) including an operational amplifier (206) having an input and an output, a sampling capacitor (203) and a set of switches (204, 205, 301, and 302) are disclosed. During a first phase, switches (201, 204) sample an input voltage by charging sampling capacitor (203). During a first portion of a second phase, the operational amplifier input is electrically coupled to sampling capacitor (203) through a first path including switch (301) having a first time constant. During a second portion of the second phase, the operational amplifier input is electrically coupled with sampling capacitor (203) through a second path including switch (302) having a second time constant, the second time constant being smaller than the first time constant.
申请公布号 US6509790(B1) 申请公布日期 2003.01.21
申请号 US20010904649 申请日期 2001.07.12
申请人 CIRRUS LOGIC, INC. 发明人 YANG YU ANG
分类号 H03H19/00;H03K5/24;(IPC1-7):H03K5/00;H03M1/12 主分类号 H03H19/00
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