| 发明名称 |
Data processing system is structured to perform as a field programmable logic system |
| 摘要 |
The system has a program counter (14) to call sequential instructions and operates with the TOS register (7) to access sub routines using branch codes. The register is integrated into microprocessor architecture. An additional status register (11) is used.
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| 申请公布号 |
DE10131084(A1) |
申请公布日期 |
2003.01.09 |
| 申请号 |
DE20011031084 |
申请日期 |
2001.06.27 |
| 申请人 |
SCHLEISIEK, KLAUS |
发明人 |
SCHLEISIEK, KLAUS |
| 分类号 |
G06F9/30;G06F9/32;G06F9/38;G06F15/78;(IPC1-7):G06F15/76 |
主分类号 |
G06F9/30 |
| 代理机构 |
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