发明名称 METHOD FOR FABRICATING MERGED MEMORY LOGIC DEVICE AND DEVICE FABRICATED THEREBY
摘要 PURPOSE: A method for fabricating a merged memory logic(MML) device is provided to form a G-poly layer which has uniform thickness and depth and is bilateral, by forming an oxide layer mask on a memory cell area including the G-poly layer through an oxidation process. CONSTITUTION: The cell area and a logic device area are defined on a semiconductor substrate(20). A gate polysilicon layer is formed on the entire surface of the memory cell area and the logic device area. An anti-reflective coating(ARC) is formed on the entire surface of the gate polysilicon layer. A photoresist layer is formed on the entire surface of the ARC. A photoresist pattern exposing the ARC formed in the upper portion of a memory cell in the memory cell area is formed. The ARC is removed by using the photoresist pattern as an etch mask to expose the gate polysilicon layer. The photoresist pattern is eliminated. The gate polysilicon layer exposed to the upper portion of the memory cell is oxidized to form the oxide mask(34). The ARC remaining in the memory cell area is removed.
申请公布号 KR20030002510(A) 申请公布日期 2003.01.09
申请号 KR20010038155 申请日期 2001.06.29
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HWANG, JAE SEONG;KIM, JAE U
分类号 H01L27/10;(IPC1-7):H01L27/10 主分类号 H01L27/10
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