| 摘要 |
PURPOSE: An apparatus for outputting a high voltage in a memory device is provided to reduce dynamic current and supply stably the high voltage for power to the memory device by controlling supply timing of a high voltage. CONSTITUTION: A voltage switching portion(10) outputs high voltages for power. An edge detection portion(20) detects an edge of a control signal. A power switching portion(30) switches the high voltages supplied to the voltage switching portion(10). The voltage switching portion(10) is formed with an inverter(INV2), NMOS transistors(N3,N4), and PMOS transistors(P3,P4). The edge detection portion has a NOR gate(22) and an inverter chain(24). A power switching portion(30) has two PMOS transistors(P11,P12). An output pulse of the edge detection portion(20) is applied to gates of the PMOS transistors(P11,P12). The high voltages are applied to sources of the PMOS transistors(P11,P12). Each drain of the PMOS transistors(P11,P12) is connected with each source of the PMOS transistors(P3,P4) of the voltage switching portion(10).
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