STANDBY MODE CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME

摘要

PURPOSE: A standby mode control circuit and a semiconductor memory device are provided to control effectively a standby mode by switching the standby mode to an active mode within a short time when a standby control circuit is controlled by a combination of various external input signals. CONSTITUTION: A CS2 buffer(101) inverts a signal of a CS2 pad. A /CS1 buffer(103) performs a logical sum operation for a signal of a /CS1 pad and an output signal of the CS2 buffer(101). A /UB buffer(105) performs the logical sum operation for a signal of a /UB pad and an output signal of the /CS1 buffer(103). An /LB buffer(107) performs the logical sum operation for a signal of an /LB pad and an output signal of the /CS1 buffer(103). A logic gate(109) performs an NOR operation for an inverted output signal of the /UB buffer(105) and an output signal of the /LB buffer(107). A delay block(303) delays the output signal of the /CS1 buffer(103). A transfer block(305) is controlled by an output signal of the delay block(303).