CIRCUIT FOR ADJUSTING CLOCK SIGNAL

摘要

PROBLEM TO BE SOLVED: To suppress the deficiency of circuit operation due to undesired radiation noise by suppressing momentary power consumption due to simultaneous change of a clock signal. SOLUTION: Respective function blocks 18, 19 and 20 synchronize with various delay clock signals 33, 34 and 35 optionally selected by a selector 26 with a control signal 43 and register setting to operate. Momentary power consumption due to simultaneous change of the clock signals is therefore suppressed so as to prevent the deficiency of circuit operation resulting from undesired radiation noise, because the falling timing of clocks is delayed by inputting a logical sum between the optionally delayed clock signals and an originally generated clock signal 23. The momentary power consumption due to the simultaneous change of the clocks signals is suppressed while maintaining synchronization of circuit operation so as to prevent the deficiency of circuit operation resulting from the undesired radiation noise.