发明名称 |
Memory array with salicide isolation |
摘要 |
The present invention provides a memory array fabricated by complementary metal-oxide-semiconductor salicide process. The memory array comprises a semiconductor substrate. Multitudes of first isolation devices are aligned in the semiconductor substrate and second isolation devices aligned on the semiconductor substrate. The alignment of the second isolation devices is parallel to one of the first isolation devices. Some polysilicon lines are on the second isolation devices therefor have null memory function. A conductive structure is below a surface of the semiconductor substrate. The conductive structure is located between the first isolation devices. A conductive contact is on the conductive structure. The correspondence of the first isolation devices and the polysilicon lines can prevent the conductive structures from short effect.
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申请公布号 |
US2002182797(A1) |
申请公布日期 |
2002.12.05 |
申请号 |
US20010901888 |
申请日期 |
2001.05.31 |
申请人 |
MACRONIX INTERNATIONAL CO., LTD. |
发明人 |
CHOU MING-HUNG;LU JUI-LIN;HUANG CHONG-JEN;HWANG SHOU-WEI;CHEN HSIN-HUEI |
分类号 |
H01L21/762;H01L21/8238;(IPC1-7):H01L21/823;H01L21/44 |
主分类号 |
H01L21/762 |
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