Semiconductor integrated circuit and method for testing the same

摘要

A coincidence detection circuit 42 is furnished to check whether a plurality of output signals read from a plurality of memory cell arrays CELL0 through CELL3 coincide with one another. A representative output buffer 36 is provided to have the output signal from the cell array CELL0 reach a representative pin DQ0 if the output signals are judged to coincide with one another, and to block the output signal from the cell array CELL0 while putting the representative pin DQ0 in a high-impedance state if the output signals are not judged to coincide. Input/output pins DQ1 through DQ3 are furnished with ordinary output buffers 32.