发明名称 UNIFORM DELAY TIME WIRING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a uniform delay time wiring method capable of suppressing the enlargement of chip size and reducing man-hours of delay time adjustment. SOLUTION: The enlargement of the chip size can be suppressed without need of securing a wiring area because a wiring length of wiring necessary for synchronization and propagating a signal is calculated (S2) and the delay time of each wiring is adjusted by modifying (S5) a wiring width so that the delay time of respective wiring is matched by the difference of the wiring length of each wiring, and since it can cope with automatic layout, the man-hours of the delay time adjustment can be reduced.
申请公布号 JP2002324840(A) 申请公布日期 2002.11.08
申请号 JP20010126790 申请日期 2001.04.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOSHIMURA MASAHIRO
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L21/82 主分类号 G06F17/50
代理机构 代理人
主权项
地址