| 摘要 |
PROBLEM TO BE SOLVED: To provide a bit-line contact and formation method thereof for a vertical DRAM array, using a bit-line contact mask. SOLUTION: In this method, a gate conductor line is formed. An oxide layer 35 is adhered to the gate conductor line, and a bit-line contact mask 40 is formed on a part of the oxide layer 35. The bit-line contact mask 40 is etched, and a silicon layer 45 is made to stick on a substrate 5. A bit-line layer 50 is adhered to the silicon layer 45. Masking and etching processes are carried out with a bit-line layer 50. An M0 metal 60 is made to adhere to the silicon layer 45, as well as on both sides of non-etching part of the bit-line (M0) layer 50, and forms the left and right bit lines. |
