| 摘要 |
<p>PROBLEM TO BE SOLVED: To solve the problem that overlap capacitance between a source and a drain is large and varies within the surface, and causes flickers and crosstalks in a high resolution device having a large display, since the positional relation between a gate and the source/drain is determined not by self alignment but by mask alignment at exposure, in the conventional TFT, regardless of whether it is a channel etch type or an etch stop type. SOLUTION: A self aligned TFT is used as a basic component. In the TFT, a gate metal/gate insulating layer, a semiconductor layer, a protective insulating layer, and even a lift-off layer are formed by collective lithography, an organic insulating layer is formed on the side surface of a gate, a resist pattern is retreated, and a source/drain region is formed. Rationalization is enabled, and the number of processes is reduced by introducing a low-temperature technique where an organic insulating layer is formed on a source/drain wiring and a passivation insulating layer is made unnecessary; and a technique where an organic insulating layer is formed on an exposed scanning line by using a process for forming a source/drain electrode and a process for forming an aperture part on the insulating layer.</p> |
