发明名称 Method and apparatus for a special stress mode for N-NARY logic that initializes the logic into a functionally illegal state
摘要 The present invention is a method and apparatus that initializes N-NARY logic and dynamic logic to a special stress mode. The present invention has a logic circuit that includes a shared logic tree with one or more evaluate nodes, one or more precharge devices, and an evaluate device. Coupled to the evaluate nodes is a state generation control circuit that generates a state signal. A state generation circuit receives the state signal from the state generation control circuit and initializes the evaluate nodes to a functionally illegal state that initializes the logic circuit to the special stress mode. One embodiment of the present invention initializes the evaluate nodes to a low state. When the first logic circuit in a series of logic circuits is initialized to the functionally illegal state, the present invention will initialize the succeeding logic circuits in the series as each phase in the different clock domains evaluate, which initializes the succeeding logic circuits to the special stress mode.
申请公布号 US6412085(B1) 申请公布日期 2002.06.25
申请号 US19990468760 申请日期 1999.12.21
申请人 INTRINSITY, INC. 发明人 HORNE STEPHEN C.;AMSTUTZ KENNETH D.
分类号 G01R31/3185;(IPC1-7):G01R31/28 主分类号 G01R31/3185
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