| 摘要 |
The invention relates to a semiconductor circuit, in particular, a flash-EEPROM storage device having selective NOR (SNOR) architecture, and to a corresponding production method. According to the invention, a multitude of word lines (WL 1 to WL3) and a multitude of bit lines (BL1, BL2) for the line-by-line and column-by-column controlling of switching elements (T), which are arranged in the form of a matrix, are placed on a semiconductor substrate (1). A multitude of electrically conductive connection strips (9), which are provided for connecting source and drain regions in the active area (AA) to the respective bit lines (BL1, BL2), are formed between the word lines (WL1, WL2) so that they directly touch the source and drain regions on the surface of the semiconductor substrate (1) in the active area (AA), whereby enabling each switching element to be individually selected. This results in obtaining a particularly compact cell surface with the simplest lithographic relationships. |
