| 摘要 |
<p>A flash memory having a high speed, low voltage ballistic program, an ultra short channel, an ultra high integration degree, and a dual bit multi-level and requiring two or three polysilicon split gate side wall processes, and the operation thereof; the flash memory, comprising a twin MONOS cell structure having an extremely short control gate channel, the cell structure further comprising (i) side wall control gates (240) disposed on the laminated film formed of oxide film - nitride film - oxide film (ONO) (230) on both sides of a word gate (245) and a control gate and a bit impurity film formed by self-aligning and shared between memory cells adjacent to each other for increased integration degree; the operation, comprising 1) a production process for removable side wall for manufacturing an ultra short channel and the side wall control gate with or without a step structure and 2) a process for forming the control gate on the laminated nitride film and impurity film by self aligning.</p> |
