发明名称 |
Collar process for reduced deep trench edge bias |
摘要 |
Disclosed is a method to provide a new deep trench collar process which reduces encroachment of strap diffusion upon array metal oxide semiconductor field effect transistors (MOSFET's) in semiconductor devices. The invention allows a reduced effective deep trench edge bias at the top of the deep trench, without compromising storage capacitance, by maximizing the distance between the MOSFET gate conductor and the deep trench storage capacitor.
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申请公布号 |
US6376324(B1) |
申请公布日期 |
2002.04.23 |
申请号 |
US20000602969 |
申请日期 |
2000.06.23 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MANDELMAN JACK A.;DIVAKARUNI RAMACHANDRA;RADENS CARL J.;GRUENING ULRIKE;SUDO AKIRA |
分类号 |
H01L27/108;H01L21/8242;(IPC1-7):H01L21/20 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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