发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a technique which can cope with micronization of an element by reducing leakage current in a source/drain part of a MISFET for information transfer. SOLUTION: A gate electrode 9 of the MISFET Qs for information transfer in a memory cell forming region is constituted of a lamination film of a polycrystalline silicon film 9a and a W film 9b. Gate electrodes 9s of an N channel type MISFET Qn1 and P channel type MISFETs Qp1 and Qp2 in a peripheral circuit forming region are constituted of a lamination film of the polycrystalline silicon film 9a and a CoSi layer 20. The CoSi layer 20 is formed on sources and drains of these MISFETs and not formed on a source and a drain of the MISFET for information transfer. As a result, refreshing performance of a memory cell can be improved, and contact holes 27, 28 can be formed precisely on the CoSi layer 20.
申请公布号 JP2002118241(A) 申请公布日期 2002.04.19
申请号 JP20000310256 申请日期 2000.10.11
申请人 HITACHI LTD 发明人 KURODA KENICHI;WATABE KOZO
分类号 H01L27/088;H01L21/60;H01L21/768;H01L21/8234;H01L21/8238;H01L21/8242;H01L21/8244;H01L27/10;H01L27/105;H01L27/108;H01L27/11;H01L29/49 主分类号 H01L27/088
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