发明名称 ENERGY ECONOMIZED PASS-TRANSISTOR LOGIC CIRCUIT AND FULL ADDER USING THE SAME
摘要 Disclosed is an energy economized pass-transistor logic having a level restoration circuit (50) free from leakage and a full adder using the same. The logic comprises a functional block (10) having a plurality of n type FET's (MI...M4), for performing at least one logical function of inputs (12, 14, 16, 18) to generate two complementary signals (20, 22), the complementary signals (20, 22) being a weak high level signal and a strong low level signal; and a level restoration block (50) having first and second CMOS inverters (52,54), for restoring the weak high level signal to a strong or full high level signal and preventing a leakage current flowing through one of the first and the second CMOS inverters (52,54) where the weak high level is applied.
申请公布号 CA2240288(C) 申请公布日期 2002.04.16
申请号 CA19972240288 申请日期 1997.01.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JOE, EU-RO;SONG, MIN-KYU;KANG, GEUN-SOON;KIM, SEONG-WON
分类号 G06F7/501;G06F7/50;H03K19/00;H03K19/0948;(IPC1-7):H03K19/094 主分类号 G06F7/501
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