发明名称 METHOD FOR FABRICATING VERTICAL BIPOLAR TRANSISTOR
摘要 PURPOSE: A method for fabricating a vertical bipolar transistor is provided to form easily a p type bottom layer of high density on an n type buried layer of high density without adding a photo mask process. CONSTITUTION: Dopant ions of n type are implanted into a p type semiconductor substrate(200) by using a photo mask. The photo mask is removed. A plurality of n+ implantation regions are formed on an npn transistor formation region and a pnp transistor formation region by diffusing the dopant ions. The first low density n type epitaxial layer(230) is grown on a whole surface of the substrate(200). The n+ implantation regions are diffused to the first low density n type epitaxial layer(230) in order to form n+ buried layers(225A,225B). A buffer oxide layer is formed thereon. A photo mask is formed on the buffer oxide layer. P type dopant ions of high density are implanted into a part of the n+ buried layer(225B) and a part of an insulating region. A low thermal oxide layer is deposited on the whole surface of the substrate(200). A p+ implanting region and an isolation region are formed on a part of the n+ buried layer(225B) and a part of the insulating region. The second epitaxial layer(270) is grown on the whole surface of the substrate(200). A p+ bottom layer of high density and the first isolation layer(265) are formed by diffusing the ions of the p+ implanting region and the isolation region to the second epitaxial layer(270).
申请公布号 KR20020066450(A) 申请公布日期 2002.08.17
申请号 KR20010006625 申请日期 2001.02.10
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HONG, JUN PYO
分类号 H01L29/73;(IPC1-7):H01L29/73 主分类号 H01L29/73
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