| 摘要 |
<p>A semiconductor wafer (1) has, an underlying dielectric layer (3) with non-planarity features at its surface due to damascene topology, and a successive dielectric layer (9) that is without damascene topology overlying the first dielectric layer (3), the successive dielectric layer (9) having a smooth polished planar surface (10) that minimizes cumulative non-planarity. The surface is polished by chemical-mechanical planarization with a reactive liquid borne by an aqueous polishing fluid applied at an interface of the successive dielectric layer (3) and a polishing pad.</p> |
