发明名称 Interface latch for data level transfer
摘要 An interface for translating data of different voltages includes an input terminal structured to accept an input from a circuit supplied by a power supply having a first voltage level, as well as an output terminal structured to provide an output from the interface a first circuit portion powered by a power supply having the first voltage level, a second circuit portion is powered by a power supply having a second voltage level, and a power supply detection circuit structured to accept a detection signal and to maintain a correct output at the output terminal even after the power supply having the first voltage level no longer supplies the first voltage level to the interface.
申请公布号 US2002033712(A1) 申请公布日期 2002.03.21
申请号 US20010943370 申请日期 2001.08.29
申请人 STMICROELECTRONCS S.R.I. 发明人 ADDUCI FRANCESCO;BONA CLAUDIO;FASSINA ANDREA
分类号 H03K3/356;H03K17/10;H03K19/003;H03K19/007;(IPC1-7):H03K19/017 主分类号 H03K3/356
代理机构 代理人
主权项
地址