| 摘要 |
A voltage converter is provided. A first cell having a first port, a first node to which a second clock is input, and a first capacitor connected between the first port and the first node, transmits an input signal to the first port in response to a first clock. A second cell having a second port, a second node to which an inverse second clock is input, and a second capacitor connected between the second port and the second node, transmits a signal of the first port to the second port in response to an inverse first clock. A third cell having a final port and a third capacitor coupled between the final port and ground, transmits a signal of the second port to the final port in response to the first clock. The first node and the second node are short-circuited in response to a control signal.
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