发明名称 |
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To manufacture a semiconductor device by applying damascene gate structure without damaging process matching in a semiconductor integrated circuit with a very large scale such as system LSI including device structure different in height such as a memory and a logic. SOLUTION: Interlayer insulating film etching back for exposing the head of a dummy gate is realized by using dry etching, instead of performing it by CMP like a conventional case in a damascene gate process. Since patterning by a resist mask becomes possible, only the arbitrary block of a logic area including damascene gate structure can selectively be etched back. Then, system LSI which mixedly loads a high device such as the stack capacitor of the memory can be manufactured. |
申请公布号 |
JP2002076335(A) |
申请公布日期 |
2002.03.15 |
申请号 |
JP20000263213 |
申请日期 |
2000.08.31 |
申请人 |
JAPAN SCIENCE & TECHNOLOGY CORP |
发明人 |
MATSUMURA HIDEKI;MORIMOTO RUI |
分类号 |
H01L21/28;H01L21/8234;H01L21/8242;H01L27/088;H01L27/108;H01L29/78 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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