发明名称 Impedance emulator
摘要 A method and device to emulate impedances includes a pair of impedances connected in series between a supply voltage and ground, the impedances forming a voltage divider having at its midpoint a reference voltage Vx. An OP AMP includes a positive input connected to the Vx node and the negative input connected to the output thereof in a direct feedback loop. The OP AMP output is also connected to a load impedance that is connected either to the supply voltage or ground. The unity gain OP AMP forces the output voltage thereof to follow the input voltage Vx, whereby the output voltage behaves as if it were created by a virtual impedance. By proper choice of components and values, the virtual impedance may comprise a large capacitor, and the remaining impedances may comprise resistance and small capacitance, both of which, together with the OP AMP, are easily integrated in a small die area. A transistor may be interposed between the load impedance and supply or ground to eliminate unacceptably large current flow through the OP AMP. The OP AMP may be provided with a negative gain, and the impedances may be scaled to create a virtual inductor having a predetermined value. Impedance emulator circuits may be combined so that the emulated impedance of one circuit may act as a virtual component in a further emulation circuit, whereby a wide range of component impedances values of may be replicated.
申请公布号 US6351137(B1) 申请公布日期 2002.02.26
申请号 US20000637350 申请日期 2000.08.15
申请人 PULSECORE, INC. 发明人 HARITON DAN ION
分类号 H03H11/48;(IPC1-7):H03K17/16;G05F3/02;H03F1/34 主分类号 H03H11/48
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