发明名称 METHODS OF FORMING INTEGRATED CIRCUITRY.
摘要 A method of forming an integrated circuitry trench isolation region includes etching a first portion of an isolation trench into a semiconductor substrate. The first portion has laterally opposing sidewalls and a trench base extending therebetween. A second portion of the isolation trench is etched into the semiconductor substrate through only a portion of the first portion trench base. After the second etching, insulative trench isolation material is deposited to be received within the first and second portions of the isolation trench. In one implementation, a method of forming integrated circuitry includes forming a trench isolation region and an adjacent shallow junction region in a semiconductor substrate. The trench isolation region includes a sidewall adjacent the shallow junction region, the trench isolation region comprising at least two insulative trench isolation materials. A first of the materials is received over at least an outermost portion of the sidewall and a second of the materials is received adjacent the first, with the first material being received between the junction isolation region and the second material. A covering insulative material is formed over the trench isolation region and the shallow junction region. A contact opening is etched through the covering insulative material to the shallow junction region and the trench isolation region substantially selective to etch the covering insulative material relative to the first trench isolation material within the trench isolation region. Integrated circuitry independent of the method of fabrication is contemplated.
申请公布号 US2002019114(A1) 申请公布日期 2002.02.14
申请号 US20010960119 申请日期 2001.09.21
申请人 TRIVEDI JIGISH D. 发明人 TRIVEDI JIGISH D.
分类号 H01L21/60;H01L21/762;H01L21/8234;(IPC1-7):H01L21/76 主分类号 H01L21/60
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