| 摘要 |
In a semiconductor integrated circuit, number of rows of transistors in each of first signal driver circuits is increased or decreased to be arranged by using MOS transistor groups in clock driver circuit regions arranged in an array, such as in portions of the bounded region of a plurality of circuit cell regions into which a core region is divided, in order to supply appropriate clock signals to cells using clock signals such as a megacell through mesh-like interconnected clock signal supply lines in the core region.
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