| 摘要 |
A cache coherency directory (303) for use in a shared memory multiprocessor computer system (100). A data structure (400) is associated with each cacheable memory location, the data structure comprising locations for storing state values indicating an exclusive state (501), a shared state (502), an uncached state (503), a busy state (506), a locked state (504), and appending state (524). The busy state and pending state cooperate to reserve a cache line for future use by a processor while the cache line is currently being used by one or more other processors.
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