发明名称 Semiconductor integrated circuit device operating with low power consumption
摘要 Transistors having large gate tunnel barriers are used as transistors to be on in a standby state, MIS transistors having thin gate insulating films are used as transistors to be off in the standby state, and main and sub-power supply lines and main and sub-ground lines forming a hierarchical power supply structure are isolated from each other in the standby state so that a gate tunnel current is reduced in the standby state in which a low power consumption is required. In general, a gate tunnel current reducing mechanism is provided for any circuitry operating in a standby state and an active state, and is activated in the standby state to reduce the gate tunnel current in the circuitry in the standby state, to reduce power consumption in the standby state.
申请公布号 US2002008999(A1) 申请公布日期 2002.01.24
申请号 US20010776681 申请日期 2001.02.06
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 HIDAKA HIDETO
分类号 H01L21/822;G11C11/403;G11C11/407;H01L21/8238;H01L21/8242;H01L27/04;H01L27/08;H01L27/092;H01L27/108;H01L29/786;H03K19/00;H03K19/0175;H03K19/094;(IPC1-7):G11C7/00 主分类号 H01L21/822
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