发明名称 METHOD FOR FABRICATING GATE CONDUCTION LAYER PATTERN OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for fabricating a gate conduction layer pattern of a semiconductor device is provided to effectively eliminate fluorine inside tungsten silicide constituting a gate electrode by performing a heat treatment process on tungsten polycide in a hydrogen atmosphere. CONSTITUTION: A gate oxide layer(1) and a polysilicon layer(2) are sequentially formed on a semiconductor substrate(4). A tungsten silicide layer(3) is formed on the polysilicon layer by using gas including WF6. The tungsten silicide layer and the polysilicon layer are selectively etched to form a gate electrode pattern. The fluorine ions inside the gate electrode pattern are eliminated by performing a heat treatment process in a hydrogen atmosphere inside a vacuum tube.
申请公布号 KR100321743(B1) 申请公布日期 2002.01.10
申请号 KR19920026942 申请日期 1992.12.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, SEONG HUI
分类号 H01L21/304;(IPC1-7):H01L21/304 主分类号 H01L21/304
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