发明名称 |
Semiconductor memory has select drive circuit which selectively drives dummy word line transistor, while operating in test mode |
摘要 |
A decision circuit determines whether a selected normal word line (WL) should be substituted with a spare word line in a memory cell array, based on which a select drive circuit selectively drives the corresponding normal word line or spare word line transistors (T). The select drive circuit selectively drives the dummy word line transistors (1a,1b) during test mode or end-page read refresh mode.
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申请公布号 |
DE10063623(A1) |
申请公布日期 |
2001.12.20 |
申请号 |
DE20001063623 |
申请日期 |
2000.12.20 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO |
发明人 |
ARITOMI, KENGO;ASAKURA, MIKIO |
分类号 |
G06F12/16;G11C11/401;G11C29/04;G11C29/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G11C29/00 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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