发明名称 Path search circuit dividing a received signal into a plurality of FFT windows
摘要 A path search circuit wherein a received signal is divided with a plurality of FFT windows to reduce arithmetic operation processing for cross-correlation coefficients is disclosed. An interleave unit divides received signal rxd into two rxd1, rxd2 at one-chip intervals, and the two sequences are picked out with overlapped FFT windows and FFT is performed for the picked out sequences by two FFT units. A cross power spectrum calculating unit determines cross power spectra between the received signal after the FFT and a reference signal stored in a reference signal storage unit. An output of the cross power spectrum calculating unit is averaged for each FFT window by an averaging unit, and IFFT is performed for the averaged cross power spectra by an IFFT unit. The two resulting cross-correlation coefficients are rearranged in order of time by a deinterleave unit and interpolated to an accuracy necessary for detection of a path timing by an interpolation unit.
申请公布号 EP1158690(A2) 申请公布日期 2001.11.28
申请号 EP20010110006 申请日期 2001.04.25
申请人 NEC CORPORATION 发明人 SATO, TOSHIFUMI
分类号 H04L27/18;H04B1/707;H04B1/7085;H04B7/26;H04L7/00;H04W4/00;H04W56/00 主分类号 H04L27/18
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