发明名称 Flip-flop circuit
摘要 The present invention includes: a series circuit which has a negative differential resistance element and another negative differential resistance element that has a control terminal capable of controlling a value of an element current; a transfer gate; a latch circuit which has negative differential resistance elements connected in series; and an inverter circuit which has an FET as a drive element and a negative differential resistance element as a load element. With this, such a flip-flop can be obtained that when a clock signal is applied to a power supply terminal of the series circuit and a control terminal of the transfer gate and an input signal is supplied to the control terminal of the negative differential resistance element, an output is placed at a terminal.
申请公布号 US6323708(B1) 申请公布日期 2001.11.27
申请号 US20000558793 申请日期 2000.04.26
申请人 NEC CORPORATION 发明人 UEMURA TETSUYA
分类号 H03K3/313;G11C5/14;H03K3/315;(IPC1-7):G11C19/00;H03K3/357 主分类号 H03K3/313
代理机构 代理人
主权项
地址