发明名称 Fabrication process for a lower electrode of a memory capacitor
摘要 A fabrication process for a lower electrode of a memory capacitor, which process is performed on a substrate already having a first insulating layer formed thereon. First, a self-aligned contact opening is formed in a first insulating layer. The self-aligned contact opening exposes a conducting area on the substrate. A conformal first conductive layer is formed on the first insulating layer and in the self-aligned contact opening, the bottom of which functions as a contact. Then, the self-aligned contact opening is filled with a second insulating layer. The first conductive layer is back etched so as to remove completely the first conductive layer that is outside the self-aligned contact opening, and to remove to a certain depth the first conductive layer that is inside the self-aligned contact opening. A second conductive layer is then formed on the sidewalls of the first and second insulating layers that are located inside the self-aligned contact opening. The second conducting layer functions as a lower electrode of a capacitor.
申请公布号 US6319771(B1) 申请公布日期 2001.11.20
申请号 US20000620842 申请日期 2000.07.21
申请人 VANGUARD INTERNATIONAL SEMICONDUCTOR CORP. 发明人 TSENG HORNG-HUEI
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01K21/824 主分类号 H01L21/02
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