| 摘要 |
Circuit for driving a nonvolatile ferroelectric memory including a first cell array unit and a second cell array unit each having a plurality of cell arrays, a first local wordline driver unit having a plurality of local wordline drivers formed on one side of the first cell array unit for providing signals for driving any of the cells in the first cell array unit, a second local wordline driver unit having a plurality of local wordline drivers formed on one side of the first local wordline driver unit for providing signals for driving any of the cells in the second cell array unit, a main wordline driver for providing a control signal for enabling either one of the first local wordline driver unit and the second wordline driver unit, and a local X decoder unit for providing driving signals to be provided to the first and second split wordlines corresponding to certain cells to the first and second local wordline driver units, whereby minimizing a chip size and maximizing a device driving capability by utilizing a layout effectively.
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