Method of fabricating a MOS transistor having SEG silicon

摘要

A method of fabricating a MOS transistor having SEG Si. After the formation of a gate and a spacer and before a source/drain region is formed, a selective epitaxial growth (SEG) Si is deposited over the substrate. The spacer is then removed to form an ultra shallow junction in the exposed substrate covered by the spacer after the formation of the SEG Si.