发明名称 CONTROL CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a control circuit that is operated stably so that a peripheral analog circuit cannot be affected by generating clocks only an interval required for control without using any external oscillation circuits. SOLUTION: This control circuit is provided with a sequencer for outputting control and end signals in synchronization with a clock by receiving the clock, an AND gate for generating a start signal by an external signal and for performing gate output by receiving the start signal at one end, a delay means for delaying output by specific time by receiving the output of the AND gate, an inverter for inverting the output by receiving the delay output of the delay means, and a solution means for generating a clock by feeding back the inverted output of the inverter to the other end of the AND gate, stopping the clock by the end signal, and giving as the clock of the sequencer.</p>
申请公布号 JP2001305196(A) 申请公布日期 2001.10.31
申请号 JP20000126276 申请日期 2000.04.20
申请人 ADVANTEST CORP 发明人 HATA YOSHIHIRO
分类号 G01R31/316;G06F1/04;H03K3/02;(IPC1-7):G01R31/316 主分类号 G01R31/316
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