| 摘要 |
A phase compensated switched attenuation device 6 is provided for attenuating high frequency signals while maintaining an insertion loss of less than 1 dB up to 3 GHz. A single GaAs FET 12 is coupled between input port 8 and output port 9 in parallel with a 20 dB pad 10 for switching the device 6 between a through state and an attenuation state. First and second isolation FET's 14 and 16 are coupled between the GaAs FET 12 and pad terminals 18 and 19 to isolate the GaAs FET 12, decrease return loss when the GaAs FET 12 is on, and increase isolation of the GaAs FET 12 from the pad 10 when the GaAs FET 12 is on. A resistor 24 or a series combination of a resistor 24 and capacitor 26 can be coupled to the pad terminals 18 and 19 in parallel with the pad 10 to improve return loss when the GaAs FET 12 is on. Resistors 21, 22, and 23 are also provided to reduce distortion, coupling gates of the FET's 12, 14, and 16 to a plurality of voltage references V1 and V2.
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